Hello! I am Likhitha
Welcome to my site. Please take a moment to learn more about me and explore my work. Feel free to contact me for any discussion, collaborations, or questions.
Likhitha Mankali
Ph.D. Candidate
Department of Electrical and Computer Engineering,
Tandon School of Engineering,
New York University
Email: likhitha.mankali@nyu.edu
Biography
I am a Ph.D. candidate in the Department of Electrical and Computer Engineering at New York University under the guidance of Prof. Ozgur Sinanoglu. My research is focused on the domain of Hardware Security. My research interests include IP Protection techniques and applying Machine learning and Fault Injection techniques to enhance and quantify the security of IP protection techniques and develop solutions for hardware security problems. Before, I graduated from IIIT Allahabad with B.tech and M.tech (dual degree) in Electrical Engineering with a silver medal in 2019. Later, I worked as a SerDes design engineer at Qualcomm, Bangalore, for a year (2019 - 2020). I have been selected for the DAC Young student Fellow Program, 2022 and 2023, and received a travel grant. Also, I won third place in Cyber Security Awareness Week (CSAW)-Logic Locking Conquest 2021.
EDUCATION
2020 - Present
2014 - 2019
Ph.D. in Electrical Engineering.
Tandon School of Engineering, New York University, USA.
Dual Degree B.Tech in Electronics and Communication Engineering, M.tech in Electrical Engineering.
IIIT Allahabad, Uttar Pradesh, India.
EXPERIENCE
2020-Present
Graduate Research Assistant
New York University
I work in the field of Hardware Security under the guidance of Prof. Ozgur Sinanoglu. I apply machine learning, such as graph neural networks (GNNs), to quantify and enhance the security of IP protection techniques in the IC supply chain.
June'24 - Aug'24
Research Intern
Synopsys
Worked on building graph neural networks (GNN)-based power, performance, and area (PPA) estimators for pre-synthesized logic designs, i.e., RTL designs.
Sep'23 - Dec'23
Lab Instructor
New York University
Taught Digital Logic lab for 38 undergraduate students. Mentored students on designing combinational/sequential logic.
Sep'22 - Dec'22
Teaching Assistant
New York University
Taught hardware security concepts that include IP protection techniques and corresponding attacks for the Hardware Security lab.
2019-2020
Design Engineer
Qualcomm
I worked as a design engineer in the SerDes team. I worked on the design of SerDes IPs.
2016
Summer Intern
Giant Meterwave Radio Telescope (GMRT), NCRA-TIFR
I worked in developing a GUI based software tool using MATLAB for calculating antenna efficiencies of GMRT antennas.
2016
Teaching Assistant
IIIT Allahabad
I worked as a teaching assistant for the course Data Structures.
2015 - 2016
Student Body Member
IIIT Allahabad
I worked as a member of the student body - Gymkhana at IIIT Allahabad.
PUBLICATIONS
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L. Mankali, O. Sinanoglu, and S. Patnaik, “INSIGHT: Attacking Industry-Adopted learning resilient logic locking techniques using explainable graph neural network,” in 33rd USENIX Security Symposium, Aug. 2024, pp. 91–108. [Online]. Available: https://shorturl.at/Rzhgb.
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L. Mankali, L. Alrahis, S. Patnaik, J. Knechtel, and O. Sinanoglu, “Titan: Security analysis of large-scale hardware obfuscation using graph neural networks,” IEEE Transactions on Information Forensics and Security (TIFS), vol. 18, pp. 304–318, 2023. DOI: 10.1109/TIFS.2022.3218429.
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L. Mankali, S. Patnaik, N. Limaye, J. Knechtel, and O. Sinanoglu, “Vigilant: Vulnerability detection tool against fault-injection attacks for locking techniques,” Trans. Comp.-Aided Des. Integ. Cir. Sys., vol. 42, no. 11, pp. 3571–3584, 2023. DOI: 10.1109/TCAD.2023.3259300.
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L. Mankali, N. Rangarajan, S. Chatterjee, S. Kumar, Y. S. Chauhan, O. Sinanoglu, and H. Amrouch, “Leveraging ferroelectric stochasticity and in-memory computing for dnn ip obfuscation,” IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, vol. 8, no. 2, pp. 102–110, 2022. DOI: 10.1109/JXCDC.2022.3217043.
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J. Bhandari, L. Mankali, M. Nabeel, O. Sinanoglu, R. Karri, and J. Knechtel, “Beware your standard cells! on their role in static power side channel attacks,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1–1, 2024. DOI: 10.1109/TCA
D.2024.3394736. -
J. Bhandari, M. Nabeel, L. Mankali, O. Sinanoglu, R. Karri, and J. Knechtel, “Lightweight masking against static power side-channel attacks,” 2024. arXiv: 2402.03196 [cs.CR]
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P. B. Roy, J. Knechtel, A. Saha, S. Sreekumar, L. Mankali, M. Nabeel, D. Mukhopadhyay, R. Karri, and O. Sinanoglu, “NiLoPher: Breaking a modern SAT-hardened logic-locking scheme via power analysis attack,” 2024. [Online]. Available: https://eprint.iacr.org/2024/309.
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L. Alrahis, L. Mankali, S. Patnaik, A. Sengupta, J. Knechtel, and O. Sinanoglu, “Un-split: Attacking split manufacturing using link prediction in graph neural networks,” in Security, Privacy, and Applied Cryptography Engineering (SPACE), 2024, pp. 197–213. DOI: 10.1007/978-3-
031-51583-5_12 -
Z. Wang, L. Alrahis, L. Mankali, J. Knechtel, and O. Sinanoglu, “Llms and the future of chip design: Unveiling security risks and building trust,” IEEE Computer Society Annual Symposium on VLSI, 2024. [Online]. Available: https://arxiv.org/abs/2405.07061
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L. Mankali, J. Bhandari, M. Alam, R. Karri, M. Maniatakos, O. Sinanoglu, J. Knechtel, ``RTL-Breaker: Assessing the Security of LLMs against Backdoor Attacks on HDL Code Generation,'' Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025. [Online]. Available: https://arxiv.org/abs/2411.17569
SKILLS
Python
Verilog
C language
MATLAB
Cadence Virtuoso
Xilinx Vivado
Synopsys Design Compiler
Synopsys Tetramax